In its recent Architecture Day, Intel previewed its latest processor offering of Intel Core i7 12th Gen. This comes as a part of Intel’s new plans for the future, including a new IDM 2.0 strategy. Intel’s latest i7 12th gen chip, officially named Alder Lake, shows performance faster than AMD’s Ryzen 7 5800X, as reported in a leaked benchmark test.
The Alder Lake SoC includes a different number of performance and efficiency cores for each variety. The fastest model builds upon eight of each. Intel’s diagrams showed mobile Alder Lake chips combining six performance cores with eight efficiency cores and ultramobile chips combining two performance cores with eight efficiency cores.
The Intel Core i7 12th Gen features 8 cores and 16 threads. However, its actual configuration must be 12 cores. Out of these 12, 8 are based on the Golden Cove & 4 should be based on the Goldmont architecture. This gives 20 threads (16 threads from performance cores and 4 threads from efficiency cores). As for the clock speeds, a base clock speed of 2.10 GHz and a boost clock speed of up to 4.80 GHz will be reached.
The L3 cache count is put for Intel Core i7 12th Gen at 25 MB cache. However, the cache will be cut down on specific Alder Lake-S configurations particularly rocking 2.75 MB (3 MB full) L3 cache on performance and a 3 MB cache per efficiency core cluster. Additionally, the performance was measured on a Q670 chipset platform with 32 GB of memory.
Intel 12th Gen i7 vs Ryzen 7 5800X
According to reports, Intel Core i7-12th Gen scored 1768 points in single-core and up to 11895 points in multi-core tests. This puts the chip 3.5 per cent faster in single-core and 21 per cent faster in multi-core tests versus the 11700K, which is an unlocked chip and features much higher clock speeds. Compared with AMD Ryzen 7 5800X, a competitor of the Core i7 chip, there is a 6 per cent increase in single-core and up to 15 per cent increase in multi-core tests.
The results are still early performance, and the benchmark isn’t running in Windows 11 OS. This is required for proper operation of the efficiency cores, which means that we could expect even higher performance in final retail chips.
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